# The Dual-Use and Related Goods (Export Control) Regulations 1995, Paragraph 65: DEFINITIONS OF TERMS IN THIS ANNEX


“Global interrupt latency time” (4) means the time taken by the computer system to recognize an interrupt due to the event, service the interrupt and perform a context switch to an alternate memory-resident task waiting on the interrupt.

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Source: https://www.legislation.gov.uk/uksi/1995/271/schedule/1/paragraph/65 (the official version)
Page: https://openlegislation.uk/dual-use-and-related-goods-export-control-regulations-1995/schedule-1/paragraph-65
Contains public sector information licensed under the Open Government Licence v3.0. Source: legislation.gov.uk, The National Archives.